Memory Training, Testing and Margining

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https://blog.asset-intertech.com/test_data_out/2014/11/memory-training-testing-and-margining.html

https://github.com/librecore-org/librecore/wiki/Understanding-DDR-Memory-Training

https://www.systemverilog.io/ddr4-initialization-and-calibration

https://en.wikipedia.org/wiki/Memory_Reference_Code